.. ECE 574 .. attention:: This document was last updated |today| Project ======= This course includes a design project that follows the ASIC design flow we studied. You can do the project either by yourself, or else in a team of no more than two students. If you decide to work in a team, then every team member will share the same grade for the project. Design Size or Team Size will not influence the grade that a project can attain. The project target is to build a hardware implementation of your choosing. The project target is up to you. The project has to be reasonably challenging and include at least RTL synthesis, and preferably a layout design of a component of your choosing. During the project, you will meet with the intructor on a weekly basis to discuss project progress. These meetings will provide early feedback on the quality and outcomes of your project. .. attention:: By all means, this is your chance to experiment with a digital hardware design into an ASIC flow. You may try out entirely new architectures using the tool flow we have studied (Genus, Innovus, Joules, Tempus, Xcelium). You may use existing IP as long as you are able to demonstrate that you are moving the state of the art forward (typically meaning a faster or a smaller design). I will encourage top-notch designs to be written up and developed into academic publications including conference, journal, or open repository submissions. Project Timeline ---------------- The project runs over 5 weeks (including Thanksgiving week). +--------------------+-------------------------+-----------------------------+-----------------+ | Week | Topic | Deliverable | Location | +====================+=========================+=============================+=================+ | 15 November | Project Definition | Team Meeting Presentation | AK 301 or Video | +--------------------+-------------------------+-----------------------------+-----------------+ | 29 November | Project Design | Team Meeting Presentation | AK 301 or Video | +--------------------+-------------------------+-----------------------------+-----------------+ | 6 December | Project Implementation | Team Meeting Presentation | AK 301 or Video | +--------------------+-------------------------+-----------------------------+-----------------+ | 13 December | Project Presentation | Class Presentation + Report | AK 232 or Video | +--------------------+-------------------------+-----------------------------+-----------------+ Project meetings will be between team members and the instructor in AK 301 during the initial stages of the project. Project meetings allocate 20 minutes per team member, i.e. a 2-member team will have a 40-minute slot. The project members prepare for the meeting by means a a short presentation to explain their plans and/or progress. The instructor will ask for clarification or enhancements where needed. The team members will have a chance to explain and motivate their plans. For students in the **synchronous** version of the course, the meetings will be scheduled in AK 301 during class time on Wednesdays. The meeting schedule will be posted on Canvas, and students will be able to sign up for a slot according to their preference. Students in the **asynchronous** version of the course must prepare a video presentation and share it with the instructor. Students will receive feedback by email. Alternately, online students may sign up for a synchronous zoom slot during class time on Wednesdays. In the latter case, the meeting schedule will be posted on Canvas, and students will be able to sign up for a slot according to their preference. The final lecture will consist of an in-class presentation by each team in the **synchronous** version of the course. Project presentations must include a formal presentation with slides, and will be made in a conference style format with moderated Q&A. Students in the **asynchronous** version of the course must prepare a video presentation, but will have a chance to present their work in the final synchronous lecture as well. Project Phases -------------- The following sections explain each of the project phases, and highlight the most important cost/quality metrics that are used in each phase. Project Definition ^^^^^^^^^^^^^^^^^^ In the project definition phase, you need to describe what you plan to build, starting with the functionality of the chip. I encourage you to identify an interesting module or consult the project ideas below. You must state the design objectives: Are you planning to design from scratch, use an existing IP, or modify/extend an existing IP? What is the external source code that you will use? What technology will you use? You can use 45nm GPDK, as we did throughout the course, but there may be alternatives to consider, such as Skywater 130nm (SKY130) or Global Foundries 180nm (GF180MCU). Are you going to design the chip up to the layout? Are you targeting multiple technologies (generic IP) or a single technology (tech-optimized IP)? What is the related work and/or state of the art? If your design involves the use of external IP, you must include at least one related work (IEEE Xplore, portal.acm.org, etc.) that describes the state of the art for your target. What are your driving constraints? Are you designing a low-area module, a high-performance module, a low-power module, or a combination of the above? In the case of a high-performance optimization, are you targeting latency or throughput? In the case of a combination of the above, what priorities are you using? Do you have any hard constraints, such as a minimum required throughput? Project Ideas: * A RISC-V based microprocessor with peripherals and on-chip memory * A hardware implementation of the fast fourier transform * A tensor processing unit (matrix multication on short wordlength) * Hardware implementation of a complex math or cryptographic operation * A packet filter for Ethernet * Digital adaptive filter for channel equalization * A low-power active RFID * An FPGA (e.g. https://openfpga.readthedocs.io/en/master/tutorials/getting_started/tools/) Project Design ^^^^^^^^^^^^^^ In the project design phase, you need to define an RTL design and verification strategy for your selected target design. Identify the main functional modules of your design, including the module hierarchy of the overall design. Describe the RTL functionality for each module (subcomponent) of your design. Specify which modules are control functions and outline the control strategies you will employ (e.g., counter, FSM, sequencer, microcontroller, etc.). Also, describe which modules are datapath functions and highlight the major arithmetic functions they perform. Outline the RTL verification strategy for your design. What will you simulate? How will you define test vectors? How will you determine if you have used a sufficient number of test vectors? Are you considering the use of formal verification tools (e.g., Conformal)? Identify the architectural optimizations that are important for your design. For high-performance design, you can consider parallelization, pipelining, unfolding, or a combination of these techniques. For low-area design, you can explore options such as multiplexing or bit-serialization. For low-power design, consider power-friendly encoding strategies, activity control, and clock gating. If you are reviewing related work, explain how your design will surpass the competition in terms of speed, size, efficiency, or other relevant factors. Highlight the unique features in your RTL design that will enable it to outperform existing solutions. Project Implementation ^^^^^^^^^^^^^^^^^^^^^^ In the project implementation phase, you need to take your RTL design through synthesis and subsequently into layout. For the post-synthesis design, provide an analysis of the area cost and the critical path. Identify opportunities to enhance your design, such as reducing area, improving performance, or reducing power consumption, and incorporate these changes into the RTL design. Remember that design is an iterative process. It is highly likely that during this phase, you may discover that your design is either too large or too slow, necessitating improvements to your RTL code. Such design enhancements are not only acceptable but also encouraged. Once you have an acceptable gate-level netlist, you can plan the input/output and layout organization for the chip. Determine whether you are designing an IP or a stand-alone chip and outline your packing strategy. Describe the organization of the input/output and the configuration of the power distribution network. For the post-layout design, present an analysis of the area cost and the critical path, taking into account the physical layout of the chip. Additionally, compare your design with related work. If the source code for related work is available, perform a comparison under identical technology constraints. If you only have access to a related publication with an implementation in a different technology, such as a different technology node or an FPGA, make a best-effort comparison of your design with the related work. Project Presentation ^^^^^^^^^^^^^^^^^^^^ The final deliverables for the project consist of a project report and a project presentation. In your project report, you should comprehensively document each phase of your project, including the definition, design, and implementation phases. Specifically, provide in-depth details on the following design aspects: 1. Design criteria and objectives: Outline the specific criteria and objectives that guided your project, explaining the problems or challenges you aimed to address. 2. Design architecture: Describe the architectural framework of your project, highlighting the key components and their interactions within the system. 3. Verification strategy: Explain your approach to verifying the correctness and functionality of your design, including the methods and tools used in the verification process. 4. Design optimizations: Discuss any optimizations or improvements made to your design, with a focus on how they impacted areas like area efficiency, performance, and power consumption. 5. Related work: Present a review of existing related work and explain how your project compares and differs from these prior efforts. 6. Implementation cost analysis: Provide an analysis of the costs associated with the implementation phase, including resource requirements and any budget considerations. The project presentation or video can have a flexible duration, but it is recommended to aim for a duration of at least 20 minutes for single-person projects and 30 minutes for two-person projects. It serves as a visual complement to the report. The written report can serve as the foundation for your presentation, with no need for an extensive write-up, as long as you effectively address all the relevant questions mentioned earlier. Grading ------- The following elements will contribute to your overall project grade. - Quality of the project definition, project design, project implementation and project presentation materials. - Attendance to project meetings. - Quality of the final design report and presentation. - Quality of the presentation and handling of questions. - Quality of the testing strategy: completeness of tests (coverage). - Quality of the comparison with related work. - Quality of the design database (RTL code, scripts, README guidelines). - Completeness of the evaluation: implementation metrics (area, performance), design space exploration, pareto analysis if applicable. .. important:: Remember that a considerable portion of your course grade is based on your final project. The most important factor to optimize is **design quality**.